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MGCM02
TDMA/AMPS IF and Baseband Interface Data Sheet
Features
* * * * * * * * * Complete IF to Baseband for IS136 100dB Gain Control Channel Filtering (30kHz) FM Demodulator RSSI Output Dual IF Synthesisers Fully Programmable via serial bus 3 Volt operation 49 Ball BGA package (7 x 7 mm) Ordering Information MGCM02/KG/BP1N MGCM02/KG/BP1Q
April 2003
Applications
* * * Dual Mode TDMA/AMPS Mobile telephones Dual Band (PCS1900/900) TDMA/AMPS Mobile telephones PCS 1900 TDMA Mobile Telephones
Description
The MGCM02 provides the complete IF to baseband I and Q including channel filtering for IS136/AMPS. The receive input is at an IF frequency up to 200MHz. This is downconverted to an internal IF of
60kHz and filtered by a switched capacitor bandpass filter which also provides image rejection. The 60kHz signal is then demodulated to give baseband I and Q signals. Over 100dB of gain control is provided. The baseband outputs can be input directly to an A to D converter. The internal FM discriminator can be used for demodulating AMPS signals. The receive path also provides RSSI. Transmit I and Q baseband signals from D to A converters can be input directly to MGCM02 which provides reconstruction filters and a variable gain buffer. The two PLL synthesisers are used for generation of the receive and transmit IF LO signals.
Receive Section
RXI OP+,60kHz IF IP+,-
90I
60kHz
RXQ OP+,LO + LO To Rx PLL RSSI AUDIO FB FM Discrim AUDIO RSSI FB RSSI
Transmit Section
Tx FM SCLK TX IIP+,TXQ IP+,TXI OP+,TXQ OP+,SDATA SLATCH RESETB PCA
Control
Rx VCO
Synthesisers
Rx Rx PD Rx LOCK
Tx VCO
Tx
Tx LOCK Tx PD
Figure 1 - Block Diagram
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MGCM02
Pad Assignment
No A1 A2 A3 A4 A5 A6 A7 B1 B2 B3 B4 B5 B6 B7 C1 C2 C3 C4 C5 C6 C7 D1 D2 D3 D4 D5 D6 D7 E1 Pin Name RTUNE VBG PCA SDATA VDD TCXO GND (TX) RXI OP+ RXI OPSCLK GND RESETB TXQ IPTXQ IP+ RXQ OPGND AGC SLATCH LOCK DET TXI IPTXI IP+ RX IP+ RXQ OP+ GND NC GND TXI OP+ VDD RX IPGround Output Power Input Input Input Power Input Ground Output Output Input Input Input Input Input Output Ground Input Input Output Input Input Input Output Ground Type Description
Data Sheet
Bias Reference - connect 100k to ground Bandgap Reference Decoupling Power Control Assert Serial Interface, Serial Data In Power Supply - Digital 19.44MHz Reference from TCXO Ground - Transmit Section Baseband Receive I Output + Baseband Receive I Output Serial Interface, Clock Ground Digital Reset (active low) Transmit Q Input Transmit Q Input + Baseband Receive Q Output Ground - Receive Section AGC control voltage Serial Interface, Latch Synthesiser Lock Detect Transmit I Input Transmit I Input + Receive IF Input + Baseband Receive Q Output + Ground (Substrate Connection) Not Connected Ground (Substrate Connection) Transmit I Output + Power Supply - Transmit Section Receive IF Input -
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Data Sheet
No E2 E3 E4 E5 E6 E7 F1 F2 F3 F4 F5 F6 F7 G1 G2 G3 G4 G5 G6 G7 Pin Name VDD RSSI UHF LOCK TX FM TXQ OP+ TXI OPAUDIO FB GND RSSI FB RX PD GND VDD TXQ OPAUDIO VDD GND VHF RESB VHF RES TX VCO TX PD Type Power Output Input Output Output Output Input Ground Input Output Ground Power Output Output Power Ground Input Input Input Output Description
MGCM02
Power Supply - RSSI and Demodulator RSSI Output UHF Synth Lock Input Transmit FM Output Transmit Q Output + Transmit I Output Demodulator Feedback Ground RSSI/Demodulator RSSI Feedback Receive PLL Charge Pump Output Ground - Synthesiser Power Supply - Synthesiser Transmit Q Output Demodulator Audio/Data Output Power Supply - Receive Section Ground (Substrate Connection) VHF VCO resonator VHF VCO resonator Transmit IF PLL Input Transmit PLL Charge Pump Output
3
MGCM02
Absolute Maximum Ratings
Supply Voltage Voltage applied to any pin Operating Temperature Storage Temperature Max Junction Temperature ESD (Human Body Model) -0.3 to 3.9V -0.3 to Vcc + 0.3 V -40 C to 100 C -55 C to 150 C 150 C 2kV
Data Sheet
Electrical Characteristics
Tamb = -40C to +85C, VDD = 3V +/- 10%. VEE = 0V. These characteristics are guaranteed by either production test or design. They apply within the specified ambient temperature and supply voltage ranges unless otherwise stated.
Value Characteristics Min Supply Current Sleep Powerdown Powerdown - Rx PLL on Powerdown - Tx PLL on Receive Section (I/Q) Receive Section (FM) Receive Section (I/Q) Receive Section (FM) Transmit Section (I/Q) Transmit Section (FM) Logic Inputs Input Voltage High - VIH Input Voltage Low - VOL Input Current Input Capacitance Logic Outputs Output Voltage Low Output Voltage High Output Current Serial Control Timing SDATA Set Up t1 SDATA Hold t2 SCLK Pulse Width t3 SLATCH Set up t4 SLATCH Pulse Width t5 SCLK Period
4
Units Typ Max
Comments
20 550
100
A A mA mA
25 26 17 17 6 3.5 0.8Vdd 0.2Vdd 10 10 0.4Vdd 0.6Vdd +/-1 20 20 50 20 50 100 t3 - 20 18.5 19.5 9 6.5
mA mA mA mA mA mA Volts Volts nA pF Volts Volts mA See Fig 7 ns ns ns ns ns ns Vin = 0 to Vdd T = 25C, Vdd = 3V T = 25C, Vdd = 3V
Data Sheet
Value Characteristics Min Switch on/off times Tx Turn on time Tx Turn off time Rx Turn on time Rx Turn off time TCXO Input Input Resistance Input Capacitance Input Sensitivity Frequency Receive - General Input Impedance Input Frequency Output Impedance Output Voltage RXI,RXQ Output Voltage RXI,RXQ Receive (IQ Mode) Min Gain Max Gain Gain Gain Resolution Gain Control Slope I/Q Gain Matching I/Q Phase Balance Group Delay Ripple Gain Ripple Noise Figure Input IP3 (Max Gain) Input IP3 (Gain = 80dB) Output 1dB Compression Receive (FM Mode) Input Sensitivity Noise Figure Input IP3 (High Gain) Audio Output -108 13 -20 500 dBm dB dBm mV 3 -35 -20 14 1.5 tbd -0.5 tbd -17 96.5 80 0.5 68 tbd +0.5 +/- 1 16 2.2 12.5 tbd dB dB dB dB dB/V dB deg s p-p dB p-p dB dBm dBm V p-p 0 to 12.5 kHz 0 to 12.5 kHz Vagc = tbd 8 40 2 1.25 Vdd/2 12 16 200 k MHz k Volts Volts Differential Differential 10 10 0.5 19.44 2 k pF V p-p MHz ac coupled 0.5 0.5 1.0 1.0 ms ms ms ms Typ Max Units
MGCM02
Comments
Selected by programming
Rs = 850 ohms Note 2 Note 3 Differential Rs = 850 Note 4 Rs = 850 Note 5 Defined by external components
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MGCM02
Value Characteristics Min Receive LO VCO Operating Frequency LO Phase Noise Receive Filter Centre Frequency 3dB Bandwidth Stop Band Attenuation 0 to 3 kHz 3 kHz to 10 kHz 10 kHz to 22 kHz 38 kHz 82 kHz 98 kHz to 110 kHz 110 kHz to 117 kHz 117 kHz to 123 kHz 123 kHz to 1.36 MHz 1.36 MHz to 1.52 MHz 1.52 MHz to 10 MHz Image Attenuation 0 to -10kHz -10 kHz to -42 kHz - 42 kHz to -78 kHz - 78 kHz to -105 kHz -105 kHz to -1.36 MHz -1.36 MHz to -1.52 MHz -1.52 MHz to -10 MHz Gain Ripple RSSI (FM Mode) Dynamic Range Accuracy RSSI Slope Input Signal - Min Input Signal - Max RSSI Output Level RSSI Output Impedance Vdd/2-1.2 1 -3 20 -100 -25 Vdd/2+1.2 75 +3 dB dB mV/dB dBm dBm V k Rs = 850 Rs = 850 Fig 6 Note 8 61 40 25 40 61 36 61 1.0 1.5 48 28 dB dB dB dB dB dB dB dB Peak 67 61 48 18 18 48 61 68 71 36 71 69 63 51 20 20 50 63 70 73 48 73 dB dB dB dB dB dB dB dB dB dB dB Fig 4 Note 7 Note 7 +/- 16 60 +/- 18 kHz kHz 100 -92 400 MHz dBc/Hz Offset = 30 kHz Note 6 Fig 3 Typ Max Units
Data Sheet
Comments
Relative to signal at 60kHz
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Data Sheet
Value Characteristics Min Transmit (I/Q and FM) Gain 11 8.5 5.5 2.5 -0.5 Input dc Voltage Output dc Voltage Output dc Voltage Input Signal Range Ouput Signal Range Input Signal - FM Output Signal - FM Output Amplitude Balance Output Phase Balance Output dc offset 3dB Filter bandwidth Gain Ripple Group Delay Variation Stop Band Attenuation Noise - in band Noise 20 to 45 kHz Noise 45 to 60 kHz Noise => 60 kHz Synthesisers Transmit PLL Frequency Receive PLL Frequency Tx PLL Input Sensitivity Charge Pump Current 1 80 100 400 140 75 13 Charge Pump Output Charge Pump sink/source mismatch Charge Pump off state current 5 nA 0.5 496 176 96 16 600 210 115 19 Vdd -0.5 +/- 15 115 400 MHz MHz mV A A A A Volts % Io +/-15% Default mode 30 40 -50 -60 -75 -85 22 20 25 0.7 30 29 1 10 deg mV p-p kHz dB s dB dB dBc dBc dBc dBc 0 to 12.5kHz 0 to 12.5kHz -0.3 12 9 6 3 0 0.8 1.25 Vdd/2 2 2 1 1 0.3 13 9.5 6.5 3.5 0.5 dB dB dB dB dB V V V V p-p V p-p V p-p V p-p dB Typ Max Units
MGCM02
Comments
Selected by programming Differential Note 9 Differential Note 9 Single-ended
100kHz to 2MHz > 2MHz Note 10 BW = 300Hz BW = 300Hz BW = 300Hz
From receive LO VCO
7
MGCM02
Notes on Electrical Characteristics
Data Sheet
All signal voltages are differential rms unless stated otherwise Intermodulation tones at offsets of 120kHz and 240kHz. Level = -61dBm Gain set to 80 dB - typically max gain required in application Output SINAD = 12dB. Input modulation is 1kHz tone with 8kHz deviation. Standard gain FM mode. Intermodulation tones at offsets of 60kHz and 120kHz. Level = - 55dBm These filter characteristics are for the 60kHz band pass filter in narrow band mode. This provides all the filtering in FM mode. There is additional filtering in I/Q mode provided by the baseband low pass filters. Details are shown in fig 2 7. Extrapolate linearly between 22kHz - 38kHz, 82kHz - 98kHz 8. Standard gain FM mode - RSSI switched internally 9. The input and output signal ranges are the maximum available. For example if the input signal is 2V pk-pk then the programmed gain can only be 0dB 10. Noise relative to full scale signal
1. 2. 3. 4. 5. 6.
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Data Sheet
Operating Description Receive Basic Architecture
The MGCM02 provides a highly integrated receive solution for dual mode IS136/AMPS mobile telephones. The input to MGCM02 is normally from the output of the first IF filter. The signal is amplified by a variable gain amplifier before being downconverted in a quadrature mixer to a low IF of 60kHz as I (In phase) and Q (Quadrature) signals. The local oscillator for this mixer is generated from an on chip VCO using external tank components. This oscillator operates at twice the LO frequency to allow the generation of accurate quadrature LO signals for the mixer. High side or low side LO injection is programmable. Further stages of voltage controlled gain are then provided at 60kHz with matched amplifiers in the I and Q channels. Gain control is provided from an external analogue control signal. This signal is digitised by an on chip 8 bit analog to digital converter. The digital outputs are then used to control the amplifiers. Figure 2 shows the amplifier configuration in more detail. The preamplifier has 4 gain settings and there are four amplifier stages at 60 kHz each providing -12 to +12dB gain in 0.5 dB steps. The gain control range will be more than adequate for most TDMA applications. The digitally controlled amplifiers provide a highly accurate and linear control of gain. The conversion rate of the analog to digital converter is 45 kHz. The I and Q signals are then combined and passed through a switched capacitor polyphase bandpass filter. This filter is a fifth order Chebyshev. The advantage of using a switched capacitor filter is that it gives very stable performance and no calibration is required. The circuit also provides rejection of the image frequency following the down conversion to 60kHz.
MGCM02
AMPS FM Mode
FM demodulation can be done using the I and Q baseband signals if supported by the baseband however the MGCM02 contains a FM demodulator. In FM mode the baseband I and Q output stages are disabled and the 60 kHz IF signal from the bandpass filter is input to a limiting amplifier and FM discriminator. The FM discriminator consists of a shift register acting as a delay line. The output of the discriminator is a digital signal which must be filtered to recover the audio signal. The discriminator output is routed through the cascaded baseband I and Q low pass smoothing filters and finally through an output buffer stage. The cut-off frequency of the low pass switched capacitor filters can be set at 25kHz for optimum filtering. External components can be used to optimise the gain and frequency response of the output amplifier. There are two methods of controlling the amplifier gain in FM Mode. 1) Fixed gain. The amplifier gain is set to a preset level. This gain level (Pre-amplifier and VGA gain = 26dB) allows the minimum sensitivity requirements to be met, but at high signal levels the gain is automatically reduced by 32.5 dB. This optimises the signal levels through the bandpass filter preventing overload and excessive phase distortion. Further details on this are given in the following RSSI section. AGC Control. In this mode the gain is controlled by the VGA control input. The RSSI level is monitored by the baseband controller and the gain level set appropriately. This mode gives improved performance in strong fading environments.
2)
RSSI
The MGCM02 also contains RSSI circuitry. This would normally be used when using the FM discriminator to provide the received signal strength to the phone microcontroller. This RSSI circuit has over 70dB dynamic range. A block diagram of the RSSI circuit is shown in figure 5. The switched capacitor filter has a limited dynamic range of approximately 50dB due to aliased noise from the sampling process used. In order to enable the RSSI to operate over a larger dynamic range gain control is required in the amplifiers before the
TDMA IS136 Mode
Following the bandpass filter the signal is mixed down to baseband I and Q signals which are output from differential outputs. There is additional baseboard filtering to remove spurii from the downconverters and clock breakthrough from the switched capacitor filters. Further detail of the MGCM02 receive path is shown in Fig 2. The baseboard outputs can be fed directly into analog to digital converters in a baseband circuit.
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MGCM02
band pass filter. This can be provided in two ways as described in the preceding FM section. In the fixed gain FM mode the RSSI output is input to a comparator. The output of this comparator then reduces the IF amplifier gain by 32.5dB thus enabling a larger dynamic range for the RSSI. Hysteresis is built in to prevent oscillation when close to the threshold level. Fig 6 shows the RSSI characteristic. At low signal levels the RSSI output increases with signal level, however at high signal level when the gain is reduced in the input path, the RSSI output is mirrored around Vdd/2 and decreases with increasing signal level. The slope is the same at high level as at low level but is of course negative. The actual slope (or gain) and settling time for the RSSI are set by external components as shown in fig 5.
60 kHz 60kHz Band Pass Switched Capacitor IF Input 90 Rx LO 60 kHz Chebychev n=5 BW = +/- 16kHz G =14dB Each gain stage is programmable from -12dB to +12 dB in 0.5dB increments
14dB
Data Sheet
The RSSI output from the MGCM02 will normally be input into an a to d converter. This, together with the baseboard controller can convert the RSSI signal to a monotonic digital output as required by the IS136 specifications. Calibration will be required to determine the slope, offset at low and high signal levels, and threshold level of the RSSI characteristic. For example if the RSSI output is less than Vdd/2 then the RSSI slope is positive; if greater than Vdd/2 than the RSSI slope is negative. If the AGC mode is used for FM then this automatic RSSI switching is disabled and the RSSI is only operated over the lower segment of the characteristic. The actual signal level must then be calculated by the baseband using the measured RSSI level and the applied AGC signal.
Low Pass Switched Capacitor 60 kHz Chebychev n=3 BW = 37.5kHz G = 8dB
Smoothing Filter Low Pass Butterworth n=2 BW = 60 kHz
I
Gain Settings -2dB 6dB 12dB 21.6dB
Q G = 6 dB
To FM Discriminator and RSSI
Figure 2 - Receive Path Block Diagram showing Gain Plan and Filters
Filter Response
0
0
Passband Detail
20 Attenuation (dB) 40 60 80 100
25 Attenuation (dB) 5 10 15 20
120 0 30 60 90 120 150
30
40
50
60
70
80
90
Frequency (kHz)
Frequency (kHz)
Figure 3 - Band Pass Filter Response
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Data Sheet
MGCM02
Image Response
0 20 Attenuation (dB) 40 60 80 100 120 0 30 60 90 120 150
Frequency (kHz)
Figure 4 - Band Pass Filter - Image Response
27k External Components Gain Adjust 60 kHz Anti Alias and Band Pass Filters RSSI Detector 1n4 RSSI
I
RSSI FB
Q
RSSI State Machine
Vth
Figure 5 - RSSI Block Diagram
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MGCM02
Data Sheet
RSSI Output (V)
VDD/2
Input Signal (dBm)
Figure 6 - RSSI Characteristic
Transmit TDMA IS136 Mode I/Q Modulation
The inputs to MGCM02 are derived from baseband digital to analog converters. These signals are passed through variable gain buffers. The gain of these buffers can be programmed from 0 to 12 dB in 3 dB increments allowing compatibility with a number of baseband and transmit modulator devices. The buffers are followed by reconstruction filters to remove spurious responses from preceding digital to analog converters. These filters are third order Butterworth with 25kHz cut off. The filters contain automatic calibration to set the cut off frequency. This can be controlled via the serial programming bus. All inputs and outputs are differential
The I+,Q+ outputs are switched high and the I-,Qoutputs are switched low to set the IQ modulator in a transmit device such as the Zarlink MGCT04 into FM mode. When using the MGCT04 the transmit IF VCO will be operating at twice the IF frequency. The frequency deviation therefore required on the VCO will be twice that required at the transmit output of that device. The input to the MGCM02 can be programmed to be either differential or single ended using the I channel inputs and the Q channel inputs are powered down. The differential input mode is the same as for TDMA. In the single ended mode only the TXI+ input is active and the FM signal must be capacitively coupled into this pin. This mode would only be used where the FM signal is from a different source to the I channel. When using this mode the differential I outputs from a baseband device must be in high impedance state. The transmit filtering used for FM mode is the same as for TDMA mode.
AMPS FM mode
There is a choice of modes available to accommodate the modulation technique used and different baseband interfaces. If I,Q modulation is used for FM modulation then the same mode is used as for TDMA ie differential input and differential output on the I and Q channels. If direct modulation of the transmit IF VCO is used then the TX FM (E5) single-ended output is used.
Synthesisers and VCO
Two VHF PLL synthsisers are included for the generation of receive and transmit IF LO signals. The two synthesisers are identical. The input to the receive PLL is from the on chip VCO. This operates at twice the LO frequency. An external tank circuit is required - typically a parallel capacitor and inductor with a varactor for tuning.
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Data Sheet
The synthesisers include 2 modulus prescalers programmable from 8/9 to 128/129 followed by a 11 bit programmable counter and 7 bit swallow counter to control the 2 modulus prescaler. The reference divider is a fully programmable 15 bit counter. The reference frequency is a 19.44MHz TCXO. The synthesiser charge pumps can be programmed to four current levels to drive the appropriate loop filters. The synthesisers also provide lock detect outputs. There is also a lock detect input pin (E4) which can be connected to the system UHF synthesiser and is then gated with the MGCM02 lock detect to give a combined lock detect output to the baseband controller via Lock Detect output pin (C5). This logic can use either the receive or transmit lock detect which is selected via the serial bus.
MGCM02
with a latch pulse following the final data bit (see fig 7). The latch input must be held low at all other times. The serial bus not only programmes the modes of operation but also enables unused sections of the device to be powered on and off as required. This is particularly important in a TDMA system when the phone does not receive or transmit all of the time. An added feature is the PCA (Power Control Assert) pin which allows the MGCM02 to alternate between receive and transmit modes without reloading commands via the serial bus and gives more accurate timing. Details of the serial bus are shown below. A total of 8 words can be programmed but some of these are for test purposes only and are not required in normal applications.
Programming
The MGCM02 features very flexible programming via a 3 wire serial bus. Data is clocked in 24 bit words
Bit Word 1 Word 2 Word 3 Word 4 Word 5 Word 6 Word 7 Word 8 23 X X X X X X X 22 X X X X X X X 21 X X X X X X X 0 0 RPP X 0 TLI 0 0 X 0 RLI TPP 0 X 0 X TPR <2:0> TDC X 0 X RPR <2:0> 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 0 0 0 0 RCO <1:0> LDC X CONT <3:0> 0 0 0 1 1 LOI 1 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1
RXDIV <17:0> TXDIV <17:0> REFRX <14:0> REFTX <14:0> TCC RTC TXC RX TCP <1:0> TX <1:0> X TEST
TXG <2:0> X RSS
TC <3:0> VPD
PCS <3:0> LPC <1:0>
CALCO <7:0>
PDF <1:0> RDC
VGA <2:0>
X RXDIV TXDIV REFRX REFTX RCP,TCP<1:0> RTC,TTC RPR,TPR<2:0> RPP,TPP TLI,RLI LDC TX<1,0> PCS<2:0>
Not used Receive Synthesiser (LO2) Divide Ratio Transmit Synthesiser Divide Ratio Receive Synthesiser Reference Divide Ratio Transmit Synthesiser Reference Divide Ratio Receive, Transmit synthesiser Charge Pump Current control Receive, Transmit synthesiser Charge Pump Tristate control Receive, Transmit synthesiser prescaler ratio Receive, Transmit synthesiser phase detector polarity Receive, Transmit lock detect invert Lock Detect Select Transmit Control Power Control System
RX LOI TXG<2:0> RSS<2:0> CONT<3:0> TXC TC<3:0> CALCO<3:0>
LPC PDF VPD TDC RDC VGA<2:0>
Receive Mode Select low/high side LO Transmit Gain RSSI Control Receive Control Transmit Calibrate Transmit Calibrate control - set to 1000 Sets transmit cut off frequency set to 00001100 for standard 25kHz cutoff Set FM Audio filter cut off frequency Enables additional FM Audio filtering LO Oscillator power down Selects transmit output bias voltage Selects receive output bias voltage Selects VGA Mode - primarily used for test purposes
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MGCM02
The programming will be described in more detail in the following sections. Serial bus timing is shown in figure 5.
Data Sheet
CONT<2> sets the bandwidth of the 60 kHz bandpass filter. The low bandwidth mode (CONT<2> = 1) should be used for FM mode however the higher bandwidth mode (+/-20 kHz) may be used in TDMA operation. The FM gain control CONT<3> is inactive unless RSS <0> is set to 1 as described in the next section. CONT<2> sets the bandwidth of the 60 kHz bandpass filter. The low bandwidth mode (CONT<2> = 1) should be used for FM mode however the higher bandwidth mode (+/-20 kHz) may be used in TDMA operation. RSS allows manual control of the input attenuator in conjunction with CONT<3>.
Receive Programming
MGCM02 has two basic receive modes: 1. I/Q mode. The 60 kHz IF signal is mixed down to baseband I and Q signals. This mode is used for IS136 TDMA and may also be used for AMPS. FM mode. The baseband I/Q path is powered down and the MGCM02 discriminator is used for demodulation. This mode can be used for AMPS.
2.
These modes are selected by the RX mode bit Word 7, Bit 11
RSS 0
Operation Normal FM Mode Manual 32 dB Gain Enable
RX 0 1
Mode 1 I/Q FM LOI - Word 7 bit 3 side LO injection The internal 60 reversed to take image rejection to - is used to select high side or low for the downconverter to 60kHz. kHz I and Q signals are also account of this and enable the operate correctly.
Additional control is provided by the receive control bits - Word 7 Bits 9:6. These program MGCM02 gain in I and Q mode and allow the input attenuator to be manually controlled.
LOI CONT <3:0> X X X X X X 0 1 X X X X 0 1 X X 0 0 1 1 X X X X 0 1 0 1 X X X X Mode Gain +0dB Gain +12dB Gain +15dB Gain +18dB +/- 20kHz Bandwidth +/- 16kHz Bandwidth FM Low Gain FM High Gain 0 1
Operation High side LO Low side LO
Extra post discriminator filtering can be programmed using LPC<1:0> and PDF<1:0> - Word 8 Bits 15-12. The PDF bits connect the switched capacitor baseband filters after the FM discriminator and are used to improve the discriminator output performance. The LPF bits allow the cut-off frequency to be reduced to 25 kHz. The LPC and PDF bits should only be used in FM mode. In TDMA mode they should be set to zero.
Normally the standard gain setting of CONT<1:0> = 00 should be used. The extra gain is provided in the amplifier after the bandpass filter and the low pass baseband filter.
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Data Sheet
LPC <1:0> 0 0 1 1 0 1 0 1 Operation Both filters 37.5kHz cut-off Filter 2 - 37.5kHz, filter 1 - 25kHz Filter 2 - 25kHz, filter 1 - 37.5kHz TX <1:0> Both filters 25kHz cut-off 0 PDF <1:0> 0 0 1 1 0 1 0 1 Operation No extra filtering Filter 1 only Filter 2 only Both filters 0 1 0 1 X
MGCM02
2. FM Mode. This is used for direct FM modulation of transmit IF oscillator. These modes are controlled by TX <1:0> - Word 6 Bits 9:8
Mode TDMA FM - Differential input FM - Single-ended input
A calibration of the transmit filters can be initialised by setting TXC - Word 6 Bit 10 to 1. After calibration the internal register for this bit is reset to 0 The transmit gain can be programmed by TXG<2:0> - Word 6 Bits 13:11
The dc level for the baseband I and Q outputs can be selected by RDC - Word 8 Bit 11 TXG <2:0> RDC 0 1 Operation Output Bias = 1.25 Volts Output Bias = Vdd/2 X 0 0 1 The VGA<2:0> - Word 8 Bits 5-3, are used to set FM gain mode and for test purposes. 1 X 0 1 0 1 1 0 0 0 0 Gain (dB) 0 3 6 9 12
VGAWD <2:0> 0 0 0
Operation Standard Mode. AGC Control for TDMA, Fixed gain for FM AGC Control for FM
The dc level for the transmit I and Q outputs can be selected by TDC - Word 8 Bit 12
TDC 0 1
Operation Output Bias = 1.25 Volts Output Bias = Vdd/2
1
1
0
The other states are used for test purposes. In TDMA mode VGAWD should always be set to 000.
Transmit Calibration
This is initiated by setting TXC - Word 6 Bit 10 high. Calibration takes approximately 0.6ms. In order for the calibration to give the required cutoff, CALCO Word 8 Bits 23:16 must be set to 00001100. The calibration code is then stored in TC<3:0> Word 6 Bits 6:3, and TXC is reset low. If TC<3:0> is overwritten then a further calibration is required.
Transmit Programming
MGCM02 has two basic transmit modes. 1. I / Q mode. I and Q signals from baseband digital to analog converter are filtered and buffered. This mode is used for IS136 TDMA.
15
MGCM02
Synthesisers
The receive and transmit synthesisers are a similar design and use identical programming. Each synthesiser includes a dual modulus (N,N+1) prescaler followed by 'A and M' counters giving a total divide ratio of MN + A. M is a 11 bit number A is a 7 bit number N is the prescaler modulus - this can also be programmed. The value of A must be less than N The A and M values are combined to give the RXDIV, TXDIV values in Words 1 and 2. 0 1 1 1 1 TPR <2:0> X 0 0 1 1 X 0 1 0 1
Data Sheet
Prescaler Ratio 8/9 16/17 32/33 64/65 128/129
Synthesiser Control
The transmit and receive synthesiser control programming is independent but has the same format.
Receive Synthesiser
M value is programmed in Word 1Bits 20:10 A value is programmed in Word 1 Bits 9:3 The reference divider REFRX, a 15 bit number, is programmed in Word 3 bits 17:3 The dual modulus prescaler is programmed by RPR<2:0> - Word 5 Bits 14:12
Charge Pump Current
Four charge pump currents for each synthesiser can be programmed using RCP,TCP<1:0>. Word 5 bits 7:6 and bits 9:8. This allows additional flexibility when optimising loop filters and overall synthesiser performance.
RCP, TCP <1:0> 0 0 1 0 1
Current (A) 496 176 96 16
RPR <2:0> 0 1 1 1 1 X 0 0 1 1 X 0 1 0 1
Prescaler Ratio 0 8/9 16/17 32/33 64/65 128/129 1 1
Charge Pump Output control
The charge pump can be inverted using RPP -Word 5 Bit 20 for the receive synthesiser and TPP - Word 4 Bit 18 for the transmit synthesiser.
Transmit Synthesiser
M value is programmed in Word 2 Bits 20:10 A value is programmed in Word 2 Bits 9:3 The reference divider REFTX, a 15 bit number, is programmed in Word 4 bits 17:3 The dual modulus prescaler is programmed by TPR<2:0> - Word 5 Bits 17:15
RPP, TPP 0 1
Mode Normal Inverted
The charge pump outputs can also be put into a high impedance inactive state using RTC,TTC - word 5 Bits 11,10. This can be used to minimise settling time when the synthesiser is idle for short periods
16
Data Sheet
RTC, TTC 0 1 Mode Normal Tristate
MGCM02
MGCM02 Power Control
MGCM02 features flexible power control using the PCS<2:0> Word 7 - Bits 17:15 using the serial bus in conjunction with the PCA pin.
Lock Detect Output Polarity
The Lock detect output polarity can be inverted using RLI, TLI - Word3 Bits 18,19. In normal operation lock detect outputs are high when locked. 0 0 0 RLI, TLI 0 1 Mode Normal Invert 0 0 0 0
PCS <3:0> 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 0 0 0 0
Mode Deep Sleep Standby TX RX Duplex Alt Rx/Tx RSSI On RSSI Off TX PLL ON TX PLL OFF RX PLL ON RX PLL OFF
Lock Detect Output Control
The receive or transmit lock detect output can be selected for gating with the UHF lock detect input using the LDC bit - Word 5 Bit 5. The gating for the total lock detect function is shown below. The RLI and TLI bits should be set to 0. The combined lock detect output is available on Pin 38
0 1 1 1 1
UHF LOCK 0 1 1
RX/TX LOCK X 0 1
LOCK DET 0 0 1
Mode UHF Unlocked UHF Locked, Rx or Tx Unlocked All PLLs Locked
Description of Power Control Modes
Deep Sleep - In this mode all circuitry is powered down except the power control circuits. Powerdown - As deep sleep but voltage reference circuits active. PLL and VCO circuit can still be active (see TX,RX PLL ON modes) RX - Receive Channel powered on. Operates in conjunction with RX mode control. TX - Transmit Channel powered on. Operates in conjunction with TX mode control. Duplex - Receive and Transmit channels active. Alt RX/TX - Receive and transmit under control of the PCA control. Receive on when PCA = 0, Transmit on when PCA = 1 RSSI on. RSSI circuitry is activated when receive mode subsequently selected. This mode must be
17
MGCM02
selected if RSSI is required in TDMA mode. The RSSI is always powered on in FM mode RSSI off. RSSI circuitry off when TDMA receive mode selected. This is the default state in TDMA mode TX PLL ON. Transmit PLL circuits remain powered on in powerdown mode. TX PLL OFF. Transmit PLL circuits are powered off in powerdown mode. RX PLL ON. Receive PLL and VCO circuits remain powered on in powerdown mode.
Data Sheet
RX PLL OFF. Receive PLL and VCO circuits are powered off in powerdown mode. These power control modes are activated by the PCA pin. The PCA pin must normally be held low whilst a power control instruction is loaded via the serial bus. The power mode is not activated however until the PCA line is taken high. This allows accurate timing of the power modes. The exception is the Alt RX/TX mode which is loaded while PCA is low. The receive and transmit modes can then be toggled with the PCA pin. In addition the receive LO Oscillator can be powered down by setting VPD (Word 7 - Bit 4) to one. This allows the LO to be provided differentially from an external oscillator.
t5
SCLK
t1
t2
t3
t6
SDATA
Bit 23
Bit 22
Bit 21
Bit 0
t4 SLATCH
PCA
Applicable for power change (PCS<3:0> only)
Figure 7 - Serial Programming
7
6
5
4
3
2
1 A B C D E F G
Bottom View
Ball Pitch 0.8mm
Figure 8 - Package Ball Layout
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Data Sheet
Applications Information
MGCM02 requires a minimal number of external components in a typical application. The TCXO input should be ac coupled using 10 nF capacitor. Internal currents in the device are set by a reference resistor connected from pin 48 to ground. The recommended value for this resistor is 100k. External components on the discriminator and RSSI pins control the output characteristics of these functions. The recommended components are shown in figures 9 and 10.
Discriminator Output AUDIO From PLL Loop Filter
MGCM02
VHF RES 10k 22p 22n tbd
VHF RESB 22p 10k
Figure 11 - External Tank Circuit The MGCM02 transmit circuits are fully compatible with transmit products from Zarlink Semiconductor such as MGCT02 and MGCT04.
47p
130k
AUDIO FB 100n
FM Operation in Fading Environment
In a severe fading environment the FM performance is improved by operating in the AGC mode. This eliminates the switching transients using the fixed gain FM mode, when the gain is switched by 32.5 dB which can cause ringing and distortion in the bandpass filter. The FM agc mode can be selected by setting VGAWD in Word 8 to '110'. The RSSI switching should be disabled by setting CONT<3> and RSS bits to '1' At low signal levels the gain should be set as for the fixed gain FM mode (Pre-amp plus VGA = 26 dB), and the agc loop should not be activated until the RSSI output voItage is approximately 1.2 volts. This maintains optimum intermodulation performance and tolerance to 'down fades'.
13k
Figure 9 - Discrminator Output Components
RSSI Output RSSI
1.5n
27k
RSSI FB
Figure 10 - RSSI Output Components Fig 11 shows the external tank circuit required for the receive VCO. These components should be mounted as close as possible to the device. The actual component values will be dependent on the required operating frequency.
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